Computer Architecture
Research team
Baruch Zoltan, Cret Octavian, Vacariu Lucia
Research fields
- FPGA-Based Digital Systems Design
- Reconfigurable Computing Systems
- Network-On-Chip
- Agent-Based Hardware Systems
- Hardware Description Languages
Recent research projects
“Mes reconfigurables pour applications biomédicales”, Romanian French bilateral cooperation, PAI; no. 14914RL, (2007-2008).
O. Cret project manager, L. Vacariu, L. Cret, D. Micu, Z. Mathe, F. Roman.
”Intelligent space of heterogeneous and context sensitive agents– SmartHouse”, national research grant funded by CNCSIS A – 8222, (2007-2008).
O. Cret project manager, A. Suciu, A. Rarau, L. Vacariu, A. Darabant, R. Marfievici, C. Vancea, C. Grama, Z. Mathe, M. Schitcu, F. Roman.
“Secure reconfigurable router with QoS support based on FPGA technology”, national research grant funded by CNCSIS, A-1007, (2005-2007).
Z. Baruch project manager, E. Cebuc, A. Peculea, C. Ardelean.
“Multi-Agent Hardware System”, national research grant funded by CNCSIS AT1-178, (2005-2007).
O. Cret project manager, A. Suciu, R. Marfievici, C. Vancea.
Publications
O. Cret, Z. Mathe, P. Ciobanu, S. Marginean, C.Lelutiu, “A Hardware Algorithm for Intron and Exon String Detection in DNAChains”, in Proceedings of the 2007 International Conference on Field Programmable Logic and Applications, Amsterdam, 2007, pp. 260-266.
Z. Baruch, A. Peculea, M. Suciu, Z. Majo, “FPGA-Based System for Network Flow Identification”, in Control Engineering and Applied Informatics, vol. 8, no. 4, December 2006, pp. 50-55.
Z. Baruch, A. Peculea, M. Suciu, Z. Majo, “Real-Time Network Flow Identification System”, in Proceedings of Fifth International Symposium of Communication Systems, Networks and Digital Signal Processing (CSNDSP 2006), Patras, Greece, July 19-21 2006, pp. 570-573.
Z. Baruch, A. Peculea, R. Arsinte, M. Suciu, Z. Majo, “Embedded System for Network Flow Identification”, in Proceedings of 2006 IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics (AQTR 2006), Cluj-Napoca, May 2006, vol. I, pp. 426-429.
Z. Baruch, “Dynamic Reconfigurable System Using Modular Design and JBits”, in Automation Computers Applied Mathematics. Scientific Journal (ACAM), vol. 14, no. 2, 2005, pp. 221-226.
Z. Baruch, C. Savin, “Reconfigurable Content-Addressable Memory”, in Automation Computers Applied Mathematics. Scientific Journal (ACAM), vol. 13, no. 2, 2005, pp. 325-329.
Z. Baruch, “Dynamic Reconfigurable System Using Modular Design and JBits”, in Automation Computers Applied Mathematics. Scientific Journal (ACAM), vol. 14, no. 2, 2005, pp. 221-226.
Z. Mathe, O. Cret, C. Grama, F. Roman, L. Vacariu, “A hardware agents-based implementation of the Kadane algorithm for the maximum subsequence problem”, Proceedings of the IEEE 2nd International Conference on Intelligent Computer Communication and Processing ICCP 2006, Cluj-Napoca, September 1-2, 2006, pp. 187-193.
O. Cret, Z. Mathe, C. Grama, L. Vacariu, F. Roman, A. Darabant, “Solving the Maximum Subsequence Problem with a Hardware Agents-based System”, WSEAS Transactions on Circuits and Systems, vol. 5, no. 9,September 2006, pp. 1470-1478.
A. Darabant, H. Todoran, O. Cret, G. Chis, “The Similarity Measures and their Impact on OODB Fragmentation Using Hierarchical Clustering Algorithms”, WSEAS Transactions on Computers, vol. 5, no. 9, September 2006, pp. 1803-1811.
O. Cret, Z. Mathe, C. Grama, L. Vacariu, F. Roman, A. Darabant, “Solving the Maximum Subsequence Problem with a Hardware Agents-based System”, Proceedings of the 10th WSEAS International Conference on CIRCUITS, Vouliagmeni, Athens, Greece, July 10-12, 2006, pp.75-80.
O. Cret, Z. Mathe, L. Vacariu, C. Grama, A. Darabant, L.-K. Gorog, ”A Hardware Implementation of the Kadane’s Algorithm for the Maximum Subsequence Problem”, Proceedings of The 5th European Symposium on Biomedical Engineering, Patras, Greece, July 7-9, 2006.